mirror of https://github.com/ARMmbed/mbed-os.git
126 lines
4.9 KiB
C
126 lines
4.9 KiB
C
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/**
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******************************************************************************
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* @file test_map.h
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* @brief Test hw module register map
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* @internal
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* @author ON Semiconductor
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* $Rev: 2848 $
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* $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
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******************************************************************************
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* Copyright 2016 Semiconductor Components Industries LLC (d/b/a <EFBFBD>ON Semiconductor<EFBFBD>).
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* All rights reserved. This software and/or documentation is licensed by ON Semiconductor
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* under limited terms and conditions. The terms and conditions pertaining to the software
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* and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
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* (<EFBFBD>ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software<EFBFBD>) and
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* if applicable the software license agreement. Do not use this software and/or
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* documentation unless you have carefully read and you agree to the limited terms and
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* conditions. By using this software and/or documentation, you agree to the limited
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* terms and conditions.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
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* INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* @endinternal
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*
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* @ingroup test
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*
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* @details
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*/
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#ifndef TEST_MAP_H_
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#define TEST_MAP_H_
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/*************************************************************************************************
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* *
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* Header files *
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* *
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*************************************************************************************************/
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#include "architecture.h"
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/**************************************************************************************************
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* *
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* Type definitions *
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* *
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**************************************************************************************************/
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/** General test registers
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*
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*/
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typedef struct {
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__IO uint32_t UNLOCK;
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__IO uint32_t ANA_TEST_MUX;
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__IO uint32_t OVD_ENA_MODE;
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__IO uint32_t OVD_VAL;
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__IO uint32_t ANA_TEST_MODE;
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__IO uint32_t CLK_TEST_MODE;
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union {
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struct {
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__IO uint32_t PAD0:1;
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__IO uint32_t PAD1:1;
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__IO uint32_t FORCE_SOURCE:1;
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__IO uint32_t FORCE_SINK:1;
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__IO uint32_t PD_CONTROL:3;
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__IO uint32_t PAD3:1;
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__IO uint32_t BYPASS_PLL_REG:1;
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__IO uint32_t PAD4:4;
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__IO uint32_t DITHER_MODE:1;
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__IO uint32_t PLL_MODE:1;
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__IO uint32_t FORCE_LOCK:1;
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} BITS;
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__IO uint32_t WORD;
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} PLL_TEST_MODE;
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__IO uint32_t RX_TEST_MODE;
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__IO uint32_t PMU_TEST_MODE;
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} TestReg_t, *TestReg_pt;
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/** Digital test registers
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*
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*/
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typedef struct {
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union {
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struct {
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__IO uint32_t PAD0 :4; /**< */
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__IO uint32_t DIO4 :4; /**< DIO4 Test Mux Control */
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__IO uint32_t DIO5 :4; /**< DIO5 Test Mux Control */
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__IO uint32_t DIO6 :4; /**< DIO6 Test Mux Control */
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__IO uint32_t DIO7 :4; /**< DIO7 Test Mux Control */
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__IO uint32_t DIO8 :4; /**< DIO8 Test Mux Control */
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__IO uint32_t DIO9 :4; /**< DIO9 Test Mux Control */
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__IO uint32_t DIO10 :4; /**< DIO10 Test Mux Control */
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} BITS;
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__IO uint32_t WORD;
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} DIG_TEST_MUX;
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__IO uint32_t DIG_TEST_MODE;
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union {
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struct {
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__IO uint32_t PAD0 :12; /**< */
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__IO uint32_t DIO5 :3; /**< DIO5 Input Test Mux Control */
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__IO uint32_t DIO6 :3; /**< DIO6 Input Test Mux Control */
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__IO uint32_t DIO7 :3; /**< DIO7 Input Test Mux Control */
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__IO uint32_t DIO8 :3; /**< DIO8 Input Test Mux Control */
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__IO uint32_t DIO9 :3; /**< DIO9 Input Test Mux Control */
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__IO uint32_t DIO10 :3; /**< DIO10 Input Test Mux Control */
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} BITS;
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__IO uint32_t WORD;
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} DIG_IN_TEST_MUX;
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__IO uint32_t SCAN_MODE;
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__IO uint32_t BIST_TEST_MUX;
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__IO uint32_t RAM_DIAG_ADDR;
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__IO uint32_t RAM_DIAG_DATA;
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__IO uint32_t SRAMA_DIAG_COMP;
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__IO uint32_t SRAMB_DIAG_COMP;
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__IO uint32_t RAM_BUF_TEST_MODE;
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} TestDigReg_t, *TestDigReg_pt;
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/** NVM test registers
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*
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*/
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typedef struct {
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__O uint32_t PAD;
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} TestNvmReg_t, *TestNvmReg_pt;
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#endif /* TEST_MAP_H_ */
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