2017-11-22 21:41:37 +00:00
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/* mbed Microcontroller Library
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2018-02-01 18:01:17 +00:00
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* Copyright (c) 2018 ARM Limited
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2018-11-09 11:22:52 +00:00
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* SPDX-License-Identifier: Apache-2.0
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2017-11-22 21:41:37 +00:00
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_CRC_API_H
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#define MBED_CRC_API_H
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|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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#include "cmsis.h"
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2018-04-24 15:00:17 +00:00
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#include "hal/crc_api.h"
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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#ifdef DEVICE_CRC
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#include "device.h"
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#endif
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2018-02-01 18:01:17 +00:00
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#include "platform/mbed_assert.h"
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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#ifdef __cplusplus
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2018-08-13 19:54:56 +00:00
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#include "platform/SingletonPtr.h"
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#include "platform/PlatformMutex.h"
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2017-11-22 21:41:37 +00:00
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2019-11-19 13:28:08 +00:00
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#ifdef UNITTEST
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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#include <type_traits>
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2019-11-19 13:28:08 +00:00
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#define MSTD_CONSTEXPR_IF_HAS_IS_CONSTANT_EVALUATED
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#else
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#include <mstd_type_traits>
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#endif
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2017-11-22 21:41:37 +00:00
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namespace mbed {
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2019-07-11 15:23:39 +00:00
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/** \addtogroup drivers-public-api */
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2017-11-22 21:41:37 +00:00
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/** @{*/
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2019-07-11 15:23:39 +00:00
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/**
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* \defgroup drivers_MbedCRC MbedCRC class
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* @{
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*/
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2017-11-22 21:41:37 +00:00
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2019-06-17 09:21:16 +00:00
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extern SingletonPtr<PlatformMutex> mbed_crc_mutex;
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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/** CRC mode selection
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*/
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enum class CrcMode {
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HARDWARE, /// Use hardware (if available), else table-based computation
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TABLE, /// Use table-based computation (if table available), else bitwise
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BITWISE /// Always use bitwise manual computation
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};
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#ifndef DOXYGEN_ONLY
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namespace impl {
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template<uint32_t polynomial, uint8_t width, CrcMode mode>
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class MbedCRC;
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constexpr bool have_crc_table(uint32_t polynomial, uint8_t width)
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{
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#if MBED_CRC_TABLE_SIZE > 0
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return (polynomial == POLY_32BIT_ANSI && width == 32) ||
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(polynomial == POLY_16BIT_IBM && width == 16) ||
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(polynomial == POLY_16BIT_CCITT && width == 16) ||
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(polynomial == POLY_8BIT_CCITT && width == 8) ||
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(polynomial == POLY_7BIT_SD && width == 7);
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#else
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return false;
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#endif
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}
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constexpr CrcMode choose_crc_mode(uint32_t polynomial, uint8_t width, CrcMode mode_limit)
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{
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return
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#if DEVICE_CRC
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mode_limit == CrcMode::HARDWARE && HAL_CRC_IS_SUPPORTED(polynomial, width) ? CrcMode::HARDWARE :
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#endif
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mode_limit <= CrcMode::TABLE && have_crc_table(polynomial, width) ? CrcMode::TABLE :
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CrcMode::BITWISE;
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}
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#endif // DOXYGEN_ONLY
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} // namespace impl
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2019-06-17 11:14:27 +00:00
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/** CRC object provides CRC generation through hardware or software
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2018-02-01 18:01:17 +00:00
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*
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2019-06-17 13:20:55 +00:00
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* CRC sums can be generated using three different methods: hardware, software ROM tables
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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* and bitwise computation. The mode used is normally selected automatically based on required
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2019-06-17 11:14:27 +00:00
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* polynomial and hardware capabilities. Any polynomial in standard form (`x^3 + x + 1`)
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* can be used for computation, but custom ones can affect the performance.
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*
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2019-06-17 13:20:55 +00:00
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* First choice is the hardware mode. The supported polynomials are hardware specific, and
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* you need to consult your MCU manual to discover them. Next, ROM polynomial tables
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* are tried (you can find list of supported polynomials here ::crc_polynomial). If the selected
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* configuration is supported, it will accelerate the software computations. If ROM tables
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* are not available for the selected polynomial, then CRC is computed at run time bit by bit
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2019-06-17 11:14:27 +00:00
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* for all data input.
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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*
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* If desired, the mode can be manually limited for a given instance by specifying the mode_limit
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* template parameter. This might be appropriate to ensure a table is not pulled in for a
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* non-speed-critical CRC, or to avoid the hardware set-up overhead if you know you will be
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* calling `compute` with very small data sizes.
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*
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2018-08-13 19:54:56 +00:00
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* @note Synchronization level: Thread safe
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2017-11-22 21:41:37 +00:00
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*
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* @tparam polynomial CRC polynomial value in hex
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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* @tparam width CRC polynomial width
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* @tparam mode_limit Maximum amount of acceleration to use
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2018-02-01 18:01:17 +00:00
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*
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* Example: Compute CRC data
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* @code
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*
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* #include "mbed.h"
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*
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* int main() {
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* MbedCRC<POLY_32BIT_ANSI, 32> ct;
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*
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* char test[] = "123456789";
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* uint32_t crc = 0;
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*
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* printf("\nPolynomial = 0x%lx Width = %d \n", ct.get_polynomial(), ct.get_width());
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*
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* ct.compute((void *)test, strlen((const char*)test), &crc);
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*
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* printf("The CRC of data \"123456789\" is : 0x%lx\n", crc);
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* return 0;
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* }
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* @endcode
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* Example: Compute CRC with data available in parts
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* @code
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*
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* #include "mbed.h"
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* int main() {
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* MbedCRC<POLY_32BIT_ANSI, 32> ct;
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*
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* char test[] = "123456789";
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* uint32_t crc = 0;
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*
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* printf("\nPolynomial = 0x%lx Width = %d \n", ct.get_polynomial(), ct.get_width());
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* ct.compute_partial_start(&crc);
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* ct.compute_partial((void *)&test, 4, &crc);
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* ct.compute_partial((void *)&test[4], 5, &crc);
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* ct.compute_partial_stop(&crc);
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* printf("The CRC of data \"123456789\" is : 0x%lx\n", crc);
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* return 0;
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* }
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* @endcode
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2017-11-22 21:41:37 +00:00
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*/
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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template <uint32_t polynomial = POLY_32BIT_ANSI, uint8_t width = 32, CrcMode mode_limit = CrcMode::HARDWARE>
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class MbedCRC {
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impl::MbedCRC<polynomial, width, impl::choose_crc_mode(polynomial, width, mode_limit)> crc_impl;
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2018-08-13 19:54:56 +00:00
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2018-04-24 15:00:17 +00:00
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public:
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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/* Backwards compatibility */
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2018-10-09 19:59:56 +00:00
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enum CrcMode {
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2018-12-19 23:16:42 +00:00
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#if DEVICE_CRC
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
HARDWARE = int(::mbed::CrcMode::HARDWARE),
|
2018-08-08 18:56:13 +00:00
|
|
|
#endif
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
TABLE = int(::mbed::CrcMode::TABLE),
|
|
|
|
BITWISE = int(::mbed::CrcMode::BITWISE)
|
2018-08-08 18:56:13 +00:00
|
|
|
};
|
2018-04-24 15:00:17 +00:00
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
typedef size_t crc_data_size_t;
|
2017-11-22 21:41:37 +00:00
|
|
|
|
|
|
|
/** Lifetime of CRC object
|
|
|
|
*
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
* @param initial_xor Initial value/seed to Xor
|
2018-02-01 18:01:17 +00:00
|
|
|
* @param final_xor Final Xor value
|
2017-11-22 21:41:37 +00:00
|
|
|
* @param reflect_data
|
|
|
|
* @param reflect_remainder
|
2018-08-13 19:54:56 +00:00
|
|
|
* @note Default constructor without any arguments is valid only for supported CRC polynomials. :: crc_polynomial_t
|
2018-02-01 18:01:17 +00:00
|
|
|
* MbedCRC <POLY_7BIT_SD, 7> ct; --- Valid POLY_7BIT_SD
|
|
|
|
* MbedCRC <0x1021, 16> ct; --- Valid POLY_16BIT_CCITT
|
|
|
|
* MbedCRC <POLY_16BIT_CCITT, 32> ct; --- Invalid, compilation error
|
2018-10-26 23:35:34 +00:00
|
|
|
* MbedCRC <POLY_16BIT_CCITT, 32> ct (i,f,rd,rr) Constructor can be used for not supported polynomials
|
2018-02-01 18:01:17 +00:00
|
|
|
* MbedCRC<POLY_16BIT_CCITT, 16> sd(0, 0, false, false); Constructor can also be used for supported
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
* polynomials with different initial/final/reflect values
|
2018-02-01 18:01:17 +00:00
|
|
|
*
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
2019-11-19 13:28:08 +00:00
|
|
|
constexpr
|
2018-03-23 19:55:07 +00:00
|
|
|
MbedCRC(uint32_t initial_xor, uint32_t final_xor, bool reflect_data, bool reflect_remainder) :
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
crc_impl(initial_xor, final_xor, reflect_data, reflect_remainder)
|
2018-03-23 19:55:07 +00:00
|
|
|
{
|
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
2019-11-21 08:53:30 +00:00
|
|
|
/* Default values for different types of polynomials
|
|
|
|
*/
|
|
|
|
// *INDENT-OFF*
|
|
|
|
template<uint32_t poly = polynomial, std::enable_if_t<poly == POLY_32BIT_ANSI && width == 32, int> = 0>
|
|
|
|
constexpr MbedCRC() : MbedCRC(0xFFFFFFFF, 0xFFFFFFFF, true, true)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
template<uint32_t poly = polynomial, std::enable_if_t<poly == POLY_16BIT_IBM && width == 16, int> = 0>
|
|
|
|
constexpr MbedCRC() : MbedCRC(0, 0, true, true)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
template<uint32_t poly = polynomial, std::enable_if_t<poly == POLY_16BIT_CCITT && width == 16, int> = 0>
|
|
|
|
constexpr MbedCRC() : MbedCRC(0xFFFF, 0, false, false)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
template<uint32_t poly = polynomial, std::enable_if_t<poly == POLY_7BIT_SD && width == 7, int> = 0>
|
|
|
|
constexpr MbedCRC() : MbedCRC(0, 0, false, false)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
template<uint32_t poly = polynomial, std::enable_if_t<poly == POLY_8BIT_CCITT && width == 8, int> = 0>
|
|
|
|
constexpr MbedCRC() : MbedCRC(0, 0, false, false)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
// *INDENT-ON*
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
|
|
|
/** Compute CRC for the data input
|
|
|
|
* Compute CRC performs the initialization, computation and collection of
|
|
|
|
* final CRC.
|
|
|
|
*
|
|
|
|
* @param buffer Data bytes
|
|
|
|
* @param size Size of data
|
|
|
|
* @param crc CRC is the output value
|
|
|
|
* @return 0 on success, negative error code on failure
|
|
|
|
*/
|
|
|
|
int32_t compute(const void *buffer, crc_data_size_t size, uint32_t *crc)
|
|
|
|
{
|
|
|
|
return crc_impl.compute(buffer, size, crc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Compute partial CRC for the data input.
|
|
|
|
*
|
|
|
|
* CRC data if not available fully, CRC can be computed in parts with available data.
|
|
|
|
*
|
|
|
|
* In case of hardware, intermediate values and states are saved by hardware. Mutex
|
|
|
|
* locking is used to serialize access to hardware CRC.
|
|
|
|
*
|
|
|
|
* In case of software CRC, previous CRC output should be passed as argument to the
|
|
|
|
* current compute_partial call. Please note the intermediate CRC value is maintained by
|
|
|
|
* application and not the driver.
|
|
|
|
*
|
|
|
|
* @pre: Call `compute_partial_start` to start the partial CRC calculation.
|
|
|
|
* @post: Call `compute_partial_stop` to get the final CRC value.
|
|
|
|
*
|
|
|
|
* @param buffer Data bytes
|
|
|
|
* @param size Size of data
|
|
|
|
* @param crc CRC value is intermediate CRC value filled by API.
|
|
|
|
* @return 0 on success or a negative error code on failure
|
|
|
|
* @note: CRC as output in compute_partial is not final CRC value, call `compute_partial_stop`
|
|
|
|
* to get final correct CRC value.
|
|
|
|
*/
|
|
|
|
int32_t compute_partial(const void *buffer, crc_data_size_t size, uint32_t *crc)
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
return crc_impl.compute_partial(buffer, size, crc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Compute partial start, indicate start of partial computation.
|
|
|
|
*
|
|
|
|
* This API should be called before performing any partial computation
|
|
|
|
* with compute_partial API.
|
|
|
|
*
|
|
|
|
* @param crc Initial CRC value set by the API
|
|
|
|
* @return 0 on success or a negative in case of failure
|
|
|
|
* @note: CRC is an out parameter and must be reused with compute_partial
|
|
|
|
* and `compute_partial_stop` without any modifications in application.
|
|
|
|
*/
|
|
|
|
int32_t compute_partial_start(uint32_t *crc)
|
|
|
|
{
|
|
|
|
return crc_impl.compute_partial_start(crc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Get the final CRC value of partial computation.
|
|
|
|
*
|
|
|
|
* CRC value available in partial computation is not correct CRC, as some
|
|
|
|
* algorithms require remainder to be reflected and final value to be XORed
|
|
|
|
* This API is used to perform final computation to get correct CRC value.
|
|
|
|
*
|
|
|
|
* @param crc CRC result
|
|
|
|
* @return 0 on success or a negative in case of failure.
|
|
|
|
*/
|
|
|
|
int32_t compute_partial_stop(uint32_t *crc)
|
|
|
|
{
|
|
|
|
return crc_impl.compute_partial_stop(crc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Get the current CRC polynomial.
|
|
|
|
*
|
|
|
|
* @return Polynomial value
|
|
|
|
*/
|
|
|
|
static constexpr uint32_t get_polynomial()
|
|
|
|
{
|
|
|
|
return polynomial;
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Get the current CRC width
|
|
|
|
*
|
|
|
|
* @return CRC width
|
|
|
|
*/
|
|
|
|
static constexpr uint8_t get_width()
|
|
|
|
{
|
|
|
|
return width;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
#if !defined(DOXYGEN_ONLY)
|
|
|
|
/* Internal implementation - basically same as public, but actual mode locked in */
|
|
|
|
namespace impl {
|
|
|
|
|
|
|
|
template <uint32_t polynomial, uint8_t width, CrcMode mode>
|
|
|
|
class MbedCRC {
|
|
|
|
public:
|
|
|
|
typedef size_t crc_data_size_t;
|
|
|
|
|
2019-11-19 13:28:08 +00:00
|
|
|
constexpr
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
MbedCRC(uint32_t initial_xor, uint32_t final_xor, bool reflect_data, bool reflect_remainder) :
|
|
|
|
_initial_value(adjust_initial_value(initial_xor, reflect_data)),
|
|
|
|
_final_xor(final_xor),
|
|
|
|
_reflect_data(reflect_data),
|
|
|
|
_reflect_remainder(reflect_remainder)
|
|
|
|
{
|
|
|
|
static_assert(width <= 32, "Max 32-bit CRC supported");
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/** Compute CRC for the data input
|
2018-08-13 19:54:56 +00:00
|
|
|
* Compute CRC performs the initialization, computation and collection of
|
|
|
|
* final CRC.
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
|
|
|
* @param buffer Data bytes
|
|
|
|
* @param size Size of data
|
|
|
|
* @param crc CRC is the output value
|
|
|
|
* @return 0 on success, negative error code on failure
|
|
|
|
*/
|
2019-05-28 14:58:19 +00:00
|
|
|
int32_t compute(const void *buffer, crc_data_size_t size, uint32_t *crc)
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
int32_t status;
|
2018-08-13 19:54:56 +00:00
|
|
|
|
|
|
|
status = compute_partial_start(crc);
|
|
|
|
if (0 != status) {
|
2017-11-22 21:41:37 +00:00
|
|
|
return status;
|
|
|
|
}
|
2018-08-13 19:54:56 +00:00
|
|
|
|
|
|
|
status = compute_partial(buffer, size, crc);
|
|
|
|
if (0 != status) {
|
2017-11-22 21:41:37 +00:00
|
|
|
return status;
|
|
|
|
}
|
2018-08-13 19:54:56 +00:00
|
|
|
|
|
|
|
status = compute_partial_stop(crc);
|
|
|
|
return status;
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/** Compute partial CRC for the data input.
|
|
|
|
*
|
|
|
|
* CRC data if not available fully, CRC can be computed in parts with available data.
|
2018-08-13 19:54:56 +00:00
|
|
|
*
|
2018-10-26 07:45:05 +00:00
|
|
|
* In case of hardware, intermediate values and states are saved by hardware. Mutex
|
2018-08-13 19:54:56 +00:00
|
|
|
* locking is used to serialize access to hardware CRC.
|
|
|
|
*
|
|
|
|
* In case of software CRC, previous CRC output should be passed as argument to the
|
|
|
|
* current compute_partial call. Please note the intermediate CRC value is maintained by
|
|
|
|
* application and not the driver.
|
|
|
|
*
|
|
|
|
* @pre: Call `compute_partial_start` to start the partial CRC calculation.
|
|
|
|
* @post: Call `compute_partial_stop` to get the final CRC value.
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
|
|
|
* @param buffer Data bytes
|
|
|
|
* @param size Size of data
|
|
|
|
* @param crc CRC value is intermediate CRC value filled by API.
|
|
|
|
* @return 0 on success or a negative error code on failure
|
2018-08-13 19:54:56 +00:00
|
|
|
* @note: CRC as output in compute_partial is not final CRC value, call `compute_partial_stop`
|
2017-11-22 21:41:37 +00:00
|
|
|
* to get final correct CRC value.
|
|
|
|
*/
|
2019-05-28 14:58:19 +00:00
|
|
|
int32_t compute_partial(const void *buffer, crc_data_size_t size, uint32_t *crc)
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
const uint8_t *data = static_cast<const uint8_t *>(buffer);
|
|
|
|
return do_compute_partial(data, size, crc);
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
|
2018-10-26 07:45:05 +00:00
|
|
|
/** Compute partial start, indicate start of partial computation.
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
|
|
|
* This API should be called before performing any partial computation
|
|
|
|
* with compute_partial API.
|
|
|
|
*
|
|
|
|
* @param crc Initial CRC value set by the API
|
|
|
|
* @return 0 on success or a negative in case of failure
|
|
|
|
* @note: CRC is an out parameter and must be reused with compute_partial
|
2018-08-13 19:54:56 +00:00
|
|
|
* and `compute_partial_stop` without any modifications in application.
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
|
|
|
int32_t compute_partial_start(uint32_t *crc)
|
|
|
|
{
|
2018-12-19 23:16:42 +00:00
|
|
|
#if DEVICE_CRC
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
if (mode == CrcMode::HARDWARE) {
|
2018-08-13 19:54:56 +00:00
|
|
|
lock();
|
2018-04-30 16:40:03 +00:00
|
|
|
crc_mbed_config_t config;
|
|
|
|
config.polynomial = polynomial;
|
2018-05-04 10:43:39 +00:00
|
|
|
config.width = width;
|
2018-04-30 16:40:03 +00:00
|
|
|
config.initial_xor = _initial_value;
|
|
|
|
config.final_xor = _final_xor;
|
|
|
|
config.reflect_in = _reflect_data;
|
|
|
|
config.reflect_out = _reflect_remainder;
|
|
|
|
|
|
|
|
hal_crc_compute_partial_start(&config);
|
2018-04-24 15:00:17 +00:00
|
|
|
}
|
2018-08-13 19:54:56 +00:00
|
|
|
#endif
|
2018-04-24 15:00:17 +00:00
|
|
|
|
2017-11-22 21:41:37 +00:00
|
|
|
*crc = _initial_value;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Get the final CRC value of partial computation.
|
|
|
|
*
|
|
|
|
* CRC value available in partial computation is not correct CRC, as some
|
|
|
|
* algorithms require remainder to be reflected and final value to be XORed
|
|
|
|
* This API is used to perform final computation to get correct CRC value.
|
|
|
|
*
|
|
|
|
* @param crc CRC result
|
2018-10-26 07:45:38 +00:00
|
|
|
* @return 0 on success or a negative in case of failure.
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
|
|
|
int32_t compute_partial_stop(uint32_t *crc)
|
|
|
|
{
|
2018-12-19 23:16:42 +00:00
|
|
|
#if DEVICE_CRC
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
if (mode == CrcMode::HARDWARE) {
|
2018-04-24 15:00:17 +00:00
|
|
|
*crc = hal_crc_get_result();
|
2018-08-13 19:54:56 +00:00
|
|
|
unlock();
|
2018-04-24 15:00:17 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2018-08-08 18:56:13 +00:00
|
|
|
#endif
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
uint_fast32_t p_crc = *crc;
|
|
|
|
if (mode == CrcMode::BITWISE) {
|
|
|
|
if (_reflect_data) {
|
|
|
|
/* CRC has MSB in bottom bit of register */
|
|
|
|
if (!_reflect_remainder) {
|
|
|
|
p_crc = reflect_crc(p_crc);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* CRC has MSB in top bit of register */
|
2019-11-19 13:28:08 +00:00
|
|
|
p_crc = _reflect_remainder ? reflect(p_crc) : shift_right(p_crc);
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
}
|
|
|
|
} else { // TABLE
|
|
|
|
/* CRC has MSB in bottom bit of register */
|
|
|
|
if (!_reflect_remainder) {
|
|
|
|
p_crc = reflect_crc(p_crc);
|
|
|
|
}
|
2019-11-26 13:45:37 +00:00
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
|
|
|
p_crc ^= _final_xor;
|
|
|
|
p_crc &= get_crc_mask();
|
|
|
|
*crc = p_crc;
|
|
|
|
|
2017-11-22 21:41:37 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
private:
|
2019-11-19 13:28:08 +00:00
|
|
|
/** Guaranteed constexpr reflection (all toolchains)
|
|
|
|
*
|
|
|
|
* @note This should never be run-time evaluated - very inefficient
|
|
|
|
* @param Register value to be reflected (full 32-bit value)
|
|
|
|
* @return Reflected value (full 32-bit value)
|
|
|
|
*/
|
|
|
|
static constexpr uint32_t reflect_constant(uint32_t data)
|
|
|
|
{
|
|
|
|
/* Doing this hard way to keep it C++11 constexpr and hence ARM C 5 compatible */
|
|
|
|
return ((data & 0x00000001) << 31) |
|
|
|
|
((data & 0x00000002) << 29) |
|
|
|
|
((data & 0x00000004) << 27) |
|
|
|
|
((data & 0x00000008) << 25) |
|
|
|
|
((data & 0x00000010) << 23) |
|
|
|
|
((data & 0x00000020) << 21) |
|
|
|
|
((data & 0x00000040) << 19) |
|
|
|
|
((data & 0x00000080) << 17) |
|
|
|
|
((data & 0x00000100) << 15) |
|
|
|
|
((data & 0x00000200) << 13) |
|
|
|
|
((data & 0x00000400) << 11) |
|
|
|
|
((data & 0x00000800) << 9) |
|
|
|
|
((data & 0x00001000) << 7) |
|
|
|
|
((data & 0x00002000) << 5) |
|
|
|
|
((data & 0x00004000) << 3) |
|
|
|
|
((data & 0x00008000) << 1) |
|
|
|
|
((data & 0x00010000) >> 1) |
|
|
|
|
((data & 0x00020000) >> 3) |
|
|
|
|
((data & 0x00040000) >> 5) |
|
|
|
|
((data & 0x00080000) >> 7) |
|
|
|
|
((data & 0x00100000) >> 9) |
|
|
|
|
((data & 0x00200000) >> 11) |
|
|
|
|
((data & 0x00400000) >> 13) |
|
|
|
|
((data & 0x00800000) >> 15) |
|
|
|
|
((data & 0x01000000) >> 17) |
|
|
|
|
((data & 0x02000000) >> 19) |
|
|
|
|
((data & 0x04000000) >> 21) |
|
|
|
|
((data & 0x08000000) >> 23) |
|
|
|
|
((data & 0x10000000) >> 25) |
|
|
|
|
((data & 0x20000000) >> 27) |
|
|
|
|
((data & 0x40000000) >> 29) |
|
|
|
|
((data & 0x80000000) >> 31);
|
|
|
|
}
|
|
|
|
|
|
|
|
/** General reflection
|
|
|
|
*
|
|
|
|
* @note This is used when we may need to perform run-time computation, so
|
|
|
|
* we need the possibility to produce the optimal run-time RBIT instruction. But
|
|
|
|
* if the compiler doesn't treat RBIT as a built-in, it's useful to have a C fallback
|
|
|
|
* for the constant case, avoiding runtime RBIT(0) computations. This is an
|
|
|
|
* optimization only available for some toolchains; others will always use runtime
|
|
|
|
* RBIT. If we require a constant expression, use reflect_constant instead.
|
|
|
|
*
|
|
|
|
* @param Register value to be reflected (full 32-bit value)
|
|
|
|
* @return Reflected value (full 32-bit value)
|
|
|
|
*/
|
|
|
|
#ifdef MSTD_HAS_IS_CONSTANT_EVALUATED
|
|
|
|
static constexpr uint32_t reflect(uint32_t data)
|
|
|
|
{
|
|
|
|
return mstd::is_constant_evaluated() ? reflect_constant(data) : __RBIT(data);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static uint32_t reflect(uint32_t data)
|
|
|
|
{
|
|
|
|
return __RBIT(data);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/** Data bytes may need to be reflected.
|
|
|
|
*
|
|
|
|
* @param data value to be reflected (bottom 8 bits)
|
|
|
|
* @return Reflected value (bottom 8 bits)
|
|
|
|
*/
|
|
|
|
static MSTD_CONSTEXPR_IF_HAS_IS_CONSTANT_EVALUATED
|
|
|
|
uint_fast32_t reflect_byte(uint_fast32_t data)
|
|
|
|
{
|
|
|
|
return reflect(data) >> 24;
|
|
|
|
}
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
/** Get the current CRC polynomial, reflected at bottom of register.
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
* @return Reflected polynomial value (so x^width term would be at bit -1)
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
static constexpr uint32_t get_reflected_polynomial()
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
2019-11-19 13:28:08 +00:00
|
|
|
return shift_right(reflect_constant(polynomial));
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
/** Get the current CRC polynomial, at top of register.
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
* @return Shifted polynomial value (so x^width term would be at bit 32)
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
static constexpr uint32_t get_top_polynomial()
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
return shift_left(polynomial);
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
const uint32_t _initial_value;
|
|
|
|
const uint32_t _final_xor;
|
|
|
|
const bool _reflect_data;
|
|
|
|
const bool _reflect_remainder;
|
|
|
|
|
|
|
|
// *INDENT-OFF*
|
|
|
|
using crc_table_t = std::conditional_t<width <= 8, uint8_t,
|
|
|
|
std::conditional_t<width <= 16, uint16_t,
|
|
|
|
uint32_t
|
|
|
|
>>;
|
|
|
|
// *INDENT-ON*
|
|
|
|
|
2019-11-19 12:16:23 +00:00
|
|
|
#if MBED_CRC_TABLE_SIZE > 0
|
|
|
|
/* Tables only actually defined for mode == TABLE, and certain polynomials - see below */
|
|
|
|
static const crc_table_t _crc_table[MBED_CRC_TABLE_SIZE];
|
|
|
|
#endif
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
2019-11-19 13:28:08 +00:00
|
|
|
static constexpr uint32_t adjust_initial_value(uint32_t initial_xor, bool reflect_data)
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
{
|
|
|
|
if (mode == CrcMode::BITWISE) {
|
|
|
|
/* For bitwise calculation, CRC register is reflected if data is, to match input.
|
|
|
|
* (MSB at bottom of register). If not reflected, it is at the top of the register
|
|
|
|
* (MSB at top of register).
|
|
|
|
*/
|
|
|
|
return reflect_data ? reflect_crc(initial_xor) : shift_left(initial_xor);
|
|
|
|
} else if (mode == CrcMode::TABLE) {
|
|
|
|
/* For table calculation, CRC value is reflected, to match tables.
|
|
|
|
* (MSB at bottom of register). */
|
|
|
|
return reflect_crc(initial_xor);
|
|
|
|
} else { // CrcMode::HARDWARE
|
|
|
|
return initial_xor;
|
|
|
|
}
|
|
|
|
}
|
2017-11-22 21:41:37 +00:00
|
|
|
|
2018-10-26 07:45:05 +00:00
|
|
|
/** Acquire exclusive access to CRC hardware/software.
|
2018-08-13 19:54:56 +00:00
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
static void lock()
|
2018-08-13 19:54:56 +00:00
|
|
|
{
|
2018-12-19 23:16:42 +00:00
|
|
|
#if DEVICE_CRC
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
if (mode == CrcMode::HARDWARE) {
|
2018-08-13 19:54:56 +00:00
|
|
|
mbed_crc_mutex->lock();
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2018-10-26 07:45:05 +00:00
|
|
|
/** Release exclusive access to CRC hardware/software.
|
2018-08-13 19:54:56 +00:00
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
static void unlock()
|
2018-08-13 19:54:56 +00:00
|
|
|
{
|
2018-12-19 23:16:42 +00:00
|
|
|
#if DEVICE_CRC
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
if (mode == CrcMode::HARDWARE) {
|
2018-08-13 19:54:56 +00:00
|
|
|
mbed_crc_mutex->unlock();
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
/** Get the CRC data mask.
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
* @return CRC data mask is generated based on current CRC width
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
static constexpr uint32_t get_crc_mask()
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
return (uint32_t)((uint32_t)2U << (width - 1)) - 1U;
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
/** CRC values may need to be reflected.
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
*
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
* @param CRC value to be reflected (width bits at bottom of 32-bit word)
|
|
|
|
* @return Reflected value (still at bottom of 32-bit word)
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
*/
|
2019-11-19 13:28:08 +00:00
|
|
|
static MSTD_CONSTEXPR_IF_HAS_IS_CONSTANT_EVALUATED
|
|
|
|
uint32_t reflect_crc(uint32_t data)
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
{
|
2019-11-19 13:28:08 +00:00
|
|
|
return reflect(data) >> (32 - width);
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
/** Register values may need to be shifted left.
|
|
|
|
*
|
|
|
|
* @param Register value to be shifted up (in bottom width bits)
|
|
|
|
* @return Shifted value (in top width bits)
|
|
|
|
*/
|
|
|
|
static constexpr uint32_t shift_left(uint32_t data)
|
|
|
|
{
|
|
|
|
return data << (32 - width);
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Register values may need to be shifted right.
|
|
|
|
*
|
|
|
|
* @param Register value to be shifted right (in top width bits)
|
|
|
|
* @return Shifted value (in bottom width bits)
|
|
|
|
*/
|
|
|
|
static constexpr uint32_t shift_right(uint32_t data)
|
|
|
|
{
|
|
|
|
return data >> (32 - width);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check to see if we can do assembler optimizations */
|
|
|
|
#if ((defined __GNUC__ || defined __clang__) && !defined __CC_ARM) && \
|
|
|
|
(defined __arm__ || defined __ARM_ARCH)
|
|
|
|
#if (__ARM_ARCH_7M__ == 1U) || \
|
|
|
|
(__ARM_ARCH_7EM__ == 1U) || \
|
|
|
|
(__ARM_ARCH_8M_MAIN__ == 1U) || \
|
|
|
|
(__ARM_ARCH_7A__ == 1U)
|
|
|
|
/* ARM that has Thumb-2 - same unified assembly is good for either ARM or Thumb state (LSRS; IT CS; EORCS reg/imm) */
|
|
|
|
#define MBED_CRC_ARM_THUMB2 1
|
|
|
|
#define MBED_CRC_THUMB1 0
|
|
|
|
#elif (__ARM_ARCH_6M__ == 1U) || \
|
|
|
|
(__ARM_ARCH_8M_BASE__ == 1U)
|
|
|
|
/* Thumb-1-only ARM-M device - use Thumb-1 compatible assembly with branch (LSRS; BCC; EORS reg) */
|
|
|
|
#define MBED_CRC_ARM_THUMB2 0
|
|
|
|
#define MBED_CRC_THUMB1 1
|
|
|
|
#else // __ARM_ARCH_xxx
|
|
|
|
#error "Unknown ARM architecture for CRC optimization"
|
|
|
|
#endif // __ARM_ARCH_xxx
|
|
|
|
#else // __arm__ || defined __ICC_ARM__ || defined __ARM_ARCH
|
|
|
|
/* Seem to be compiling for non-ARM, or an unsupported toolchain, so stick with C implementations */
|
|
|
|
#define MBED_CRC_ARM_THUMB2 0
|
|
|
|
#define MBED_CRC_THUMB1 0
|
|
|
|
#endif
|
|
|
|
|
|
|
|
// *INDENT-OFF*
|
|
|
|
/** Process 1 bit of non-reflected CRC
|
|
|
|
*
|
|
|
|
* Shift the p_crc register left 1 bit - if a one is shifted
|
|
|
|
* out, exclusive-or with the polynomial mask.
|
|
|
|
*
|
|
|
|
* Assembler optimizations can be applied here, to make
|
|
|
|
* use of the CPU's carry output from shifts.
|
|
|
|
*
|
|
|
|
* @param p_crc input register value
|
|
|
|
* @return updated register value
|
|
|
|
*/
|
|
|
|
static uint_fast32_t do_1_bit_normal(uint_fast32_t p_crc)
|
|
|
|
{
|
|
|
|
#if MBED_CRC_ARM_THUMB2
|
|
|
|
__asm(".syntax unified\n\t"
|
|
|
|
"LSLS" "\t%[p_crc], %[p_crc], #1\n\t"
|
|
|
|
"IT" "\tCS\n\t"
|
|
|
|
"EORCS" "\t%[p_crc], %[poly]"
|
|
|
|
: [p_crc] "+&r" (p_crc)
|
|
|
|
: [poly] "rI" (get_top_polynomial())
|
|
|
|
: "cc");
|
|
|
|
#elif MBED_CRC_THUMB1
|
|
|
|
__asm(".syntax unified\n\t"
|
|
|
|
"LSLS" "\t%[p_crc], %[p_crc], #1\n\t"
|
|
|
|
"BCC" "\t%=f\n\t"
|
|
|
|
"EORS" "\t%[p_crc], %[poly]\n"
|
|
|
|
"%=:"
|
|
|
|
: [p_crc] "+&l" (p_crc)
|
|
|
|
: [poly] "l" (get_top_polynomial())
|
|
|
|
: "cc");
|
|
|
|
#else
|
|
|
|
if (p_crc & 0x80000000) {
|
|
|
|
p_crc = (p_crc << 1) ^ get_top_polynomial();
|
2017-11-22 21:41:37 +00:00
|
|
|
} else {
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
p_crc = (p_crc << 1);
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
#endif
|
|
|
|
return p_crc;
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
/** Process 1 bit of reflected CRC
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
* Shift the p_crc register right 1 bit - if a one is shifted
|
|
|
|
* out, exclusive-or with the polynomial mask.
|
|
|
|
*
|
|
|
|
* Assembler optimizations can be applied here, to make
|
|
|
|
* use of the CPU's carry output from shifts.
|
|
|
|
*
|
|
|
|
* @param p_crc input register value
|
|
|
|
* @return updated register value
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
static uint_fast32_t do_1_bit_reflected(uint_fast32_t p_crc)
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
#if MBED_CRC_ARM_THUMB2
|
|
|
|
__asm(".syntax unified\n\t"
|
|
|
|
"LSRS" "\t%[p_crc], %[p_crc], #1\n\t"
|
|
|
|
"IT" "\tCS\n\t"
|
|
|
|
"EORCS" "\t%[p_crc], %[poly]"
|
|
|
|
: [p_crc] "+&r" (p_crc)
|
|
|
|
: [poly] "rI" (get_reflected_polynomial())
|
|
|
|
: "cc");
|
|
|
|
#elif MBED_CRC_THUMB1
|
|
|
|
__asm(".syntax unified\n\t"
|
|
|
|
"LSRS" "\t%[p_crc], %[p_crc], #1\n\t"
|
|
|
|
"BCC" "\t%=f\n\t"
|
|
|
|
"EORS" "\t%[p_crc], %[poly]\n"
|
|
|
|
"%=:"
|
|
|
|
: [p_crc] "+&l" (p_crc)
|
|
|
|
: [poly] "l" (get_reflected_polynomial())
|
|
|
|
: "cc");
|
|
|
|
#else
|
|
|
|
if (p_crc & 1) {
|
|
|
|
p_crc = (p_crc >> 1) ^ get_reflected_polynomial();
|
2017-11-22 21:41:37 +00:00
|
|
|
} else {
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
p_crc = (p_crc >> 1);
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
#endif
|
|
|
|
return p_crc;
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
// *INDENT-ON*
|
2017-11-22 21:41:37 +00:00
|
|
|
|
2018-10-26 07:45:05 +00:00
|
|
|
/** Bitwise CRC computation.
|
2017-11-22 21:41:37 +00:00
|
|
|
*
|
|
|
|
* @param buffer data buffer
|
|
|
|
* @param size size of the data
|
|
|
|
* @param crc CRC value is filled in, but the value is not the final
|
|
|
|
* @return 0 on success or a negative error code on failure
|
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
template<CrcMode mode_ = mode>
|
|
|
|
std::enable_if_t<mode_ == CrcMode::BITWISE, int32_t>
|
|
|
|
do_compute_partial(const uint8_t *data, crc_data_size_t size, uint32_t *crc) const
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
uint_fast32_t p_crc = *crc;
|
2017-11-22 21:41:37 +00:00
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
if (_reflect_data) {
|
|
|
|
/* Everything is reflected to match data - MSB of polynomial at bottom of 32-bit register */
|
2019-11-26 13:45:37 +00:00
|
|
|
for (crc_data_size_t byte = 0; byte < size; byte++) {
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
p_crc ^= data[byte];
|
|
|
|
|
|
|
|
// Perform modulo-2 division, a bit at a time
|
|
|
|
for (unsigned int bit = 8; bit > 0; --bit) {
|
|
|
|
p_crc = do_1_bit_reflected(p_crc);
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
/* Polynomial is shifted to put MSB of polynomial at top of 32-bit register */
|
2017-11-22 21:41:37 +00:00
|
|
|
for (crc_data_size_t byte = 0; byte < size; byte++) {
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
p_crc ^= (uint_fast32_t) data[byte] << 24;
|
2017-11-22 21:41:37 +00:00
|
|
|
|
|
|
|
// Perform modulo-2 division, a bit at a time
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
for (unsigned int bit = 8; bit > 0; --bit) {
|
|
|
|
p_crc = do_1_bit_normal(p_crc);
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
|
|
|
*crc = p_crc;
|
|
|
|
|
2017-11-22 21:41:37 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-11-19 12:16:23 +00:00
|
|
|
#if MBED_CRC_TABLE_SIZE > 0
|
2018-10-26 07:45:05 +00:00
|
|
|
/** CRC computation using ROM tables.
|
2018-05-24 15:58:14 +00:00
|
|
|
*
|
|
|
|
* @param buffer data buffer
|
|
|
|
* @param size size of the data
|
|
|
|
* @param crc CRC value is filled in, but the value is not the final
|
|
|
|
* @return 0 on success or a negative error code on failure
|
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
template<CrcMode mode_ = mode>
|
|
|
|
std::enable_if_t<mode_ == CrcMode::TABLE, int32_t>
|
|
|
|
do_compute_partial(const uint8_t *data, crc_data_size_t size, uint32_t *crc) const
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
uint_fast32_t p_crc = *crc;
|
|
|
|
// GCC has been observed to not hoist the load of _reflect_data out of the loop
|
|
|
|
// Note the inversion because table and CRC are reflected - data must be
|
|
|
|
bool reflect = !_reflect_data;
|
|
|
|
|
|
|
|
for (crc_data_size_t byte = 0; byte < size; byte++) {
|
|
|
|
uint_fast32_t data_byte = data[byte];
|
|
|
|
if (reflect) {
|
|
|
|
data_byte = reflect_byte(data_byte);
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
#if MBED_CRC_TABLE_SIZE == 16
|
|
|
|
p_crc = _crc_table[(data_byte ^ p_crc) & 0xF] ^ (p_crc >> 4);
|
|
|
|
data_byte >>= 4;
|
|
|
|
p_crc = _crc_table[(data_byte ^ p_crc) & 0xF] ^ (p_crc >> 4);
|
|
|
|
#else
|
|
|
|
p_crc = _crc_table[(data_byte ^ p_crc) & 0xFF] ^ (p_crc >> 8);
|
|
|
|
#endif
|
2017-11-22 21:41:37 +00:00
|
|
|
}
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
*crc = p_crc;
|
2017-11-22 21:41:37 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2019-11-19 12:16:23 +00:00
|
|
|
#endif
|
2017-11-22 21:41:37 +00:00
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
#ifdef DEVICE_CRC
|
|
|
|
/** Hardware CRC computation.
|
|
|
|
*
|
|
|
|
* @param buffer data buffer
|
|
|
|
* @param size size of the data
|
|
|
|
* @return 0 on success or a negative error code on failure
|
2017-11-22 21:41:37 +00:00
|
|
|
*/
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
template<CrcMode mode_ = mode>
|
|
|
|
std::enable_if_t<mode_ == CrcMode::HARDWARE, int32_t>
|
|
|
|
do_compute_partial(const uint8_t *data, crc_data_size_t size, uint32_t *) const
|
2017-11-22 21:41:37 +00:00
|
|
|
{
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
hal_crc_compute_partial(data, size);
|
|
|
|
return 0;
|
2019-11-26 13:45:37 +00:00
|
|
|
}
|
|
|
|
#endif
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
2019-11-26 13:45:37 +00:00
|
|
|
};
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
|
2019-11-19 12:16:23 +00:00
|
|
|
#if MBED_CRC_TABLE_SIZE > 0
|
|
|
|
/* Declarations of the tables we provide. (Not strictly needed, but compilers
|
|
|
|
* can warn if they see us using the template without a generic definition, so
|
|
|
|
* let it know we have provided these specialisations.)
|
|
|
|
*/
|
|
|
|
template<>
|
|
|
|
const uint8_t MbedCRC<POLY_7BIT_SD, 7, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE];
|
|
|
|
|
|
|
|
template<>
|
|
|
|
const uint8_t MbedCRC<POLY_8BIT_CCITT, 8, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE];
|
|
|
|
|
|
|
|
template<>
|
|
|
|
const uint16_t MbedCRC<POLY_16BIT_CCITT, 16, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE];
|
|
|
|
|
|
|
|
template<>
|
|
|
|
const uint16_t MbedCRC<POLY_16BIT_IBM, 16, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE];
|
|
|
|
|
|
|
|
template<>
|
|
|
|
const uint32_t MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE];
|
|
|
|
|
|
|
|
#endif // MBED_CRC_TABLE_SIZE > 0
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
} // namespace impl
|
|
|
|
|
|
|
|
#endif // !defined(DOXYGEN_ONLY)
|
|
|
|
|
2017-11-22 21:41:37 +00:00
|
|
|
/** @}*/
|
2019-07-11 15:23:39 +00:00
|
|
|
/** @}*/
|
|
|
|
|
2017-11-22 21:41:37 +00:00
|
|
|
} // namespace mbed
|
|
|
|
|
Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
|
|
|
#endif // __cplusplus
|
|
|
|
|
|
|
|
/* Internal helper for mbed_error.c crash recovery */
|
|
|
|
#ifdef __cplusplus
|
|
|
|
extern "C"
|
|
|
|
#endif
|
|
|
|
uint32_t mbed_tiny_compute_crc32(const void *data, int datalen);
|
|
|
|
|
2017-11-22 21:41:37 +00:00
|
|
|
#endif
|