2016-09-06 14:01:19 +00:00
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/* mbed Microcontroller Library
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*******************************************************************************
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2017-11-07 16:18:09 +00:00
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* Copyright (c) 2017, STMicroelectronics
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2016-09-06 14:01:19 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#if DEVICE_LOWPOWERTIMER
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#include "rtc_api_hal.h"
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2018-01-09 13:10:14 +00:00
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#if MBED_CONF_TARGET_LOWPOWERTIMER_LPTIM
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LPTIM_HandleTypeDef LptimHandle;
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volatile uint32_t lp_SlaveCounter = 0;
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volatile uint32_t lp_oc_int_part = 0;
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volatile uint16_t lp_TickPeriod_us;
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volatile uint8_t lp_Fired = 0;
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static void LPTIM1_IRQHandler(void);
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static void (*irq_handler)(void);
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void lp_ticker_init(void)
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{
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/* Check if LPTIM is already configured */
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#if (TARGET_STM32L0)
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if (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN) != RESET) {
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return;
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}
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#else
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if (__HAL_RCC_LPTIM1_IS_CLK_ENABLED()) {
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return;
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}
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#endif
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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#if MBED_CONF_TARGET_LSE_AVAILABLE
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/* Enable LSE clock */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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/* Select the LSE clock as LPTIM peripheral clock */
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
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#if (TARGET_STM32L0)
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RCC_PeriphCLKInitStruct.LptimClockSelection = RCC_LPTIM1CLKSOURCE_LSE;
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#else
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RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSE;
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#endif
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#else /* MBED_CONF_TARGET_LSE_AVAILABLE */
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/* Enable LSI clock */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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/* Select the LSI clock as LPTIM peripheral clock */
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
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#if (TARGET_STM32L0)
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RCC_PeriphCLKInitStruct.LptimClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
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#else
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RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
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#endif
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#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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error("HAL_RCC_OscConfig ERROR\n");
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return;
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}
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if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct) != HAL_OK) {
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error("HAL_RCCEx_PeriphCLKConfig ERROR\n");
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return;
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}
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__HAL_RCC_LPTIM1_CLK_ENABLE();
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__HAL_RCC_LPTIM1_FORCE_RESET();
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__HAL_RCC_LPTIM1_RELEASE_RESET();
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/* Initialize the LPTIM peripheral */
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LptimHandle.Instance = LPTIM1;
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LptimHandle.State = HAL_LPTIM_STATE_RESET;
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LptimHandle.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
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/* Prescaler impact:
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tick period = Prescaler division factor / LPTIM clock
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Example with LPTIM clock = 32768 Hz LSE
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Prescaler = LPTIM_PRESCALER_DIV1 => lp_TickPeriod_us = 31us => 2s with 16b timer
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Prescaler = LPTIM_PRESCALER_DIV2 => lp_TickPeriod_us = 61us => 4s with 16b timer
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Prescaler = LPTIM_PRESCALER_DIV4 => lp_TickPeriod_us = 122us => 8s with 16b timer
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Prescaler = LPTIM_PRESCALER_DIV8 => lp_TickPeriod_us = 244us => 16s with 16b timer
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Prescaler = LPTIM_PRESCALER_DIV16 => lp_TickPeriod_us = 488us => 32s with 16b timer
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Prescaler = LPTIM_PRESCALER_DIV32 => lp_TickPeriod_us = 976us => 64s with 16b timer
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Prescaler = LPTIM_PRESCALER_DIV64 => lp_TickPeriod_us = 1.9ms => 128s with 16b timer
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Prescaler = LPTIM_PRESCALER_DIV128 => lp_TickPeriod_us = 3.9ms => 256s with 16b timer
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*/
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LptimHandle.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV2;
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lp_TickPeriod_us = 2 * 1000000 / RTC_CLOCK;
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LptimHandle.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
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LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
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LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
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LptimHandle.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
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#if (TARGET_STM32L4)
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LptimHandle.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
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LptimHandle.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
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#endif /* TARGET_STM32L4 */
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if (HAL_LPTIM_Init(&LptimHandle) != HAL_OK) {
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error("HAL_LPTIM_Init ERROR\n");
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return;
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}
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NVIC_SetVector(LPTIM1_IRQn, (uint32_t)LPTIM1_IRQHandler);
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NVIC_EnableIRQ(LPTIM1_IRQn);
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#if !(TARGET_STM32L4)
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/* EXTI lines are not configured by default */
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__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
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__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
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#endif
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__HAL_LPTIM_ENABLE_IT(&LptimHandle, LPTIM_IT_ARRM);
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__HAL_LPTIM_ENABLE_IT(&LptimHandle, LPTIM_IT_CMPM);
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__HAL_LPTIM_ENABLE_IT(&LptimHandle, LPTIM_IT_CMPOK);
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HAL_LPTIM_Counter_Start(&LptimHandle, 0xFFFF);
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}
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static void LPTIM1_IRQHandler(void)
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{
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LptimHandle.Instance = LPTIM1;
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if (lp_Fired) {
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lp_Fired = 0;
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if (irq_handler) {
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irq_handler();
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}
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}
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/* Compare match interrupt */
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if (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_CMPM) != RESET) {
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if (__HAL_LPTIM_GET_IT_SOURCE(&LptimHandle, LPTIM_IT_CMPM) != RESET) {
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/* Clear Compare match flag */
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__HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPM);
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if (lp_oc_int_part > 0) {
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lp_oc_int_part--;
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} else {
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if (irq_handler) {
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irq_handler();
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}
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}
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}
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}
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/* Compare write interrupt */
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if (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_CMPOK) != RESET) {
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if (__HAL_LPTIM_GET_IT_SOURCE(&LptimHandle, LPTIM_IT_CMPOK) != RESET) {
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/* Clear Compare write flag */
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__HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPOK);
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}
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}
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/* Autoreload match interrupt */
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if (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_ARRM) != RESET) {
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if (__HAL_LPTIM_GET_IT_SOURCE(&LptimHandle, LPTIM_IT_ARRM) != RESET) {
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/* Clear Autoreload match flag */
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__HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_ARRM);
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lp_SlaveCounter++;
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}
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}
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#if !(TARGET_STM32L4)
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__HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
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#endif
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}
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uint32_t lp_ticker_read_TickCounter(void)
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{
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uint16_t cntH_old, cntH, cntL;
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LptimHandle.Instance = LPTIM1;
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/* same algo as us_ticker_read in us_ticker_16b.c */
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do {
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cntH_old = lp_SlaveCounter;
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if (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_ARRM) == SET) {
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cntH_old += 1;
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}
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cntL = LPTIM1->CNT;
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cntH = lp_SlaveCounter;
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if (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_ARRM) == SET) {
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cntH += 1;
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}
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} while (cntH_old != cntH);
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uint32_t lp_time = (uint32_t)(cntH << 16 | cntL);
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return lp_time;
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}
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uint32_t lp_ticker_read(void)
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{
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lp_ticker_init();
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return lp_ticker_read_TickCounter() * (uint32_t)lp_TickPeriod_us;
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}
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void lp_ticker_set_interrupt(timestamp_t timestamp)
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{
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// Disable IRQs
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core_util_critical_section_enter();
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uint32_t timestamp_TickCounter = timestamp / (uint32_t)lp_TickPeriod_us;
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LptimHandle.Instance = LPTIM1;
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irq_handler = (void (*)(void))lp_ticker_irq_handler;
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__HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPOK);
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__HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPM);
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__HAL_LPTIM_COMPARE_SET(&LptimHandle, timestamp_TickCounter & 0xFFFF);
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/* CMPOK is set by hardware to inform application that the APB bus write operation to the LPTIM_CMP register has been successfully completed */
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while (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_CMPOK) == RESET) {
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}
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/* same algo as us_ticker_set_interrupt in us_ticker_16b.c */
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uint32_t current_time_TickCounter = lp_ticker_read_TickCounter();
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uint32_t delta = timestamp_TickCounter - current_time_TickCounter;
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lp_oc_int_part = (delta - 1) >> 16;
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if ( ((delta - 1) & 0xFFFF) >= 0x8000 &&
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__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_CMPM) == SET ) {
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++lp_oc_int_part;
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}
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// Enable IRQs
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core_util_critical_section_exit();
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}
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void lp_ticker_fire_interrupt(void)
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{
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lp_Fired = 1;
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NVIC_SetPendingIRQ(LPTIM1_IRQn);
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}
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void lp_ticker_disable_interrupt(void)
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{
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LptimHandle.Instance = LPTIM1;
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__HAL_LPTIM_DISABLE_IT(&LptimHandle, LPTIM_IT_CMPM);
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}
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void lp_ticker_clear_interrupt(void)
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{
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LptimHandle.Instance = LPTIM1;
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__HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPM);
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}
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#else /* MBED_CONF_TARGET_LOWPOWERTIMER_LPTIM */
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2016-09-06 14:01:19 +00:00
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void lp_ticker_init(void)
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{
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rtc_init();
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}
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uint32_t lp_ticker_read(void)
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{
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2016-11-23 15:41:32 +00:00
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uint32_t usecs = 0;
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time_t time = 0;
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2016-09-06 14:01:19 +00:00
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do {
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2016-12-06 08:54:24 +00:00
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time = rtc_read();
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usecs = rtc_read_subseconds();
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2016-09-06 14:01:19 +00:00
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} while (time != rtc_read());
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2016-11-23 15:41:32 +00:00
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2016-09-06 14:01:19 +00:00
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return (time * 1000000) + usecs;
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}
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void lp_ticker_set_interrupt(timestamp_t timestamp)
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{
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uint32_t delta;
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delta = timestamp - lp_ticker_read();
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rtc_set_wake_up_timer(delta);
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}
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Ticker: add fire interrupt now function
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.
set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.
It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.
The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)
All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
2017-06-27 11:18:59 +00:00
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void lp_ticker_fire_interrupt(void)
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{
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NVIC_SetPendingIRQ(RTC_WKUP_IRQn);
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}
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2016-09-06 14:01:19 +00:00
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void lp_ticker_disable_interrupt(void)
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{
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rtc_deactivate_wake_up_timer();
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}
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void lp_ticker_clear_interrupt(void)
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{
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2017-11-07 16:18:09 +00:00
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NVIC_ClearPendingIRQ(RTC_WKUP_IRQn);
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2016-09-06 14:01:19 +00:00
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}
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2018-01-09 13:10:14 +00:00
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#endif /* MBED_CONF_TARGET_LOWPOWERTIMER_LPTIM */
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2017-11-07 16:18:09 +00:00
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#endif /* DEVICE_LOWPOWERTIMER */
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