mirror of https://github.com/ARMmbed/mbed-os.git
508 lines
17 KiB
Python
508 lines
17 KiB
Python
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#! /usr/bin/env python
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# Memory Map File Analyser for ARM mbed OS
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import argparse
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import sys
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import string
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import os
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import re
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import json
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import time
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import string
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import StringIO
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from prettytable import PrettyTable
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debug = False
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class MemmapParser(object):
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def __init__(self):
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"""
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General initialization
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"""
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# list of all modules and their sections
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self.modules = dict()
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self.misc_flash_sections = ('.interrupts', '.flash_config')
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self.other_sections = ('.interrupts_ram', '.init', '.ARM.extab', '.ARM.exidx', '.ARM.attributes', \
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'.eh_frame', '.init_array', '.fini_array', '.jcr', '.stab', '.stabstr', \
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'.ARM.exidx','.ARM' )
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# sections to print info (generic for all toolchains)
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self.sections = ('.text', '.data', '.bss', '.heap', '.stack',)
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# need to have sections merged in this order ()
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self.all_sections = self.sections + self.other_sections + \
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self.misc_flash_sections + ('unknown', 'OUTPUT')
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self.print_sections = ('.text', '.data', '.bss')
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# list of all object files and mappting to module names
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self.object_to_module = dict()
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def generate_output(self, file, json_mode):
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"""
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Generates summary of memory map data
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Parameters
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file: descriptor (either stdout or file)
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json_mode: generates output in json formal (True/False)
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"""
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buf = StringIO.StringIO()
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# Calculate misc flash sections
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misc_flash_mem = 0
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for i in self.modules:
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for k in self.misc_flash_sections:
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if self.modules[i][k]:
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misc_flash_mem += self.modules[i][k]
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# Create table
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colums = ['Module']
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for i in list(self.print_sections):
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colums.append(i)
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table = PrettyTable(colums)
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table.align["Module"] = "l"
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subtotal = dict()
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for k in self.sections:
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subtotal[k] = 0
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json_obj = []
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for i in sorted(self.modules):
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row = []
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row.append(i)
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for k in self.sections:
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subtotal[k] += self.modules[i][k]
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for k in self.print_sections:
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row.append(self.modules[i][k])
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json_obj.append({ "module":i, "size":{k:self.modules[i][k] for k in self.print_sections}})
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table.add_row(row)
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subtotal_row = ['Subtotals']
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for k in self.print_sections:
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subtotal_row.append(subtotal[k])
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table.add_row(subtotal_row)
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if json_mode:
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json_obj.append({ "summary":{'static_ram':(subtotal['.data']+subtotal['.bss']),
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'heap':(subtotal['.heap']),
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'stack':(subtotal['.stack']),
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'total_ram':(subtotal['.data']+subtotal['.bss']+subtotal['.heap']+subtotal['.stack']),
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'total_flash':(subtotal['.text']+subtotal['.data']+misc_flash_mem),}})
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file.write(json.dumps(json_obj, indent=4))
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file.write('\n')
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else:
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file.write(table.get_string())
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file.write('\n')
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file.write("Static RAM memory (data + bss): %s\n" % (str(subtotal['.data']+subtotal['.bss'])))
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file.write("Heap: %s\n" % str(subtotal['.heap']))
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file.write("Stack: %s\n" % str(subtotal['.stack']))
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file.write("Total RAM memory (data + bss + heap + stack): %s\n" % (str(subtotal['.data']+subtotal['.bss']+subtotal['.heap']+subtotal['.stack'])))
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file.write("Total Flash memory (text + data + misc): %s\n" % (str(subtotal['.text']+subtotal['.data']+misc_flash_mem)))
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return
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def module_add(self, module_name, size, section):
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"""
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Adds a module / section to the list
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"""
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if module_name in self.modules:
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self.modules[module_name][section] += size
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else:
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temp_dic = dict()
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for x in self.all_sections:
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temp_dic[x] = 0
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temp_dic[section] = size
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self.modules[module_name] = temp_dic
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def find_start_gcc(self,line):
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"""
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Checks location of gcc map file to start parsing map file
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"""
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if line.startswith('Linker script and memory map'):
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return True
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else:
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return False
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def find_start_armcc(self,line):
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"""
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Checks location of armcc map file to start parsing map file
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"""
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if line.startswith(' Base Addr Size'):
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return True
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else:
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return False
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def find_start_iar(self,line):
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"""
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Checks location of armcc map file to start parsing map file
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"""
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if line.startswith(' Section '):
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return True
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else:
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return False
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def check_new_section_gcc(self,line):
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"""
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Check whether a new section in a map file has been detected (only applies to gcc)
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"""
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for i in self.all_sections:
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if line.startswith(i):
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return i # should name of the section (assuming it's a known one)
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if line.startswith('.'):
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return 'unknown' # all others are clasified are unknown
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else:
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return False # everything else, means no change in section
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def path_object_to_module_name(self,txt):
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"""
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Parses path to object file and extracts module / object data
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"""
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txt = txt.replace('\\','/')
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rex_mbed_os_name = r'^.+mbed-os\/(.+)\/(.+\.o)$'
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test_rex_mbed_os_name = re.match(rex_mbed_os_name,txt)
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if test_rex_mbed_os_name:
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object_name = test_rex_mbed_os_name.group(2)
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data = test_rex_mbed_os_name.group(1).split('/')
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ndata = len(data)
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if ndata == 1:
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module_name = data[0]
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else:
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module_name = data[0] + '/' + data[1]
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return [module_name, object_name]
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else:
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return ['Misc', ""]
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def parse_section_gcc(self,line):
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"""
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Parse data from a section of gcc map file
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"""
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# examples
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# 0x00004308 0x7c ./.build/K64F/GCC_ARM/mbed-os/hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/spi_api.o
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# .text 0x00000608 0x198 ./.build/K64F/GCC_ARM/mbed-os/core/mbed-rtos/rtx/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/HAL_CM4.o
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rex_address_len_name = r'^\s+.*0x(\w{8,16})\s+0x(\w+)\s(.+)$'
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test_address_len_name = re.match(rex_address_len_name,line)
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if test_address_len_name:
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if int(test_address_len_name.group(2),16) == 0: # size == 0
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return ["",0] # no valid entry
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else:
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m_name, m_object = self.path_object_to_module_name(test_address_len_name.group(3))
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m_size = int(test_address_len_name.group(2),16)
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return [m_name,m_size]
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else: # special cortner case for *fill* sections
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# example
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# *fill* 0x0000abe4 0x4
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rex_address_len = r'^\s+\*fill\*\s+0x(\w{8,16})\s+0x(\w+).*$'
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test_address_len = re.match(rex_address_len,line)
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if test_address_len:
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if int(test_address_len.group(2),16) == 0: # size == 0
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return ["",0] # no valid entry
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else:
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m_name = 'Misc'
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m_size = int(test_address_len.group(2),16)
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return [m_name,m_size]
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else:
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return ["",0] # no valid entry
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def parse_map_file_gcc(self, file):
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"""
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Main logic to decode gcc map files
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"""
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current_section = 'unknown'
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with file as infile:
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# Search area to parse
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for line in infile:
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if self.find_start_gcc(line) == True:
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current_section = "unknown"
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break
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# Start decoding the map file
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for line in infile:
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change_section = self.check_new_section_gcc(line)
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if change_section == "OUTPUT": # finish parsing file: exit
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break
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elif change_section != False:
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current_section = change_section
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[module_name, module_size] = self.parse_section_gcc(line)
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if module_size == 0 or module_name == "":
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pass
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else:
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self.module_add(module_name, module_size, current_section)
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if debug:
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print "Line: %s" % line,
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print "Module: %s\tSection: %s\tSize: %s" % (module_name,current_section,module_size)
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raw_input("----------")
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def parse_section_armcc(self,line):
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"""
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Parse data from an armcc map file
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"""
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# Examples of armcc map file:
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# Base_Addr Size Type Attr Idx E Section Name Object
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# 0x00000000 0x00000400 Data RO 11222 RESET startup_MK64F12.o
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# 0x00000410 0x00000008 Code RO 49364 * !!!main c_w.l(__main.o)
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rex_armcc = r'^\s+0x(\w{8})\s+0x(\w{8})\s+(\w+)\s+(\w+)\s+(\d+)\s+[*]?.+\s+(.+)$'
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test_rex_armcc = re.match(rex_armcc,line)
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if test_rex_armcc:
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size = int(test_rex_armcc.group(2),16)
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if test_rex_armcc.group(4) == 'RO':
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section = '.text'
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else:
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if test_rex_armcc.group(3) == 'Data':
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section = '.data'
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elif test_rex_armcc.group(3) == 'Zero':
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section = '.bss'
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else:
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print "BUG armcc map parser"
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raw_input()
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# lookup object in dictionary and return module name
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object_name = test_rex_armcc.group(6)
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if object_name in self.object_to_module:
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module_name = self.object_to_module[object_name]
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else:
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module_name = 'Misc'
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return [module_name,size,section]
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else:
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return ["",0,""] # no valid entry
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def parse_section_iar(self,line):
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"""
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Parse data from an IAR map file
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"""
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# Examples of IAR map file:
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# Section Kind Address Size Object
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# .intvec ro code 0x00000000 0x198 startup_MK64F12.o [15]
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# .rodata const 0x00000198 0x0 zero_init3.o [133]
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# .iar.init_table const 0x00008384 0x2c - Linker created -
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# Initializer bytes const 0x00000198 0xb2 <for P3 s0>
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# .data inited 0x20000000 0xd4 driverAtmelRFInterface.o [70]
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# .bss zero 0x20000598 0x318 RTX_Conf_CM.o [4]
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# .iar.dynexit uninit 0x20001448 0x204 <Block tail>
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# HEAP uninit 0x20001650 0x10000 <Block tail>
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rex_iar = r'^\s+(.+)\s+(zero|const|ro code|inited|uninit)\s+0x(\w{8})\s+0x(\w+)\s+(.+)\s.+$'
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test_rex_iar = re.match(rex_iar,line)
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if test_rex_iar:
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size = int(test_rex_iar.group(4),16)
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if test_rex_iar.group(2) == 'const' or test_rex_iar.group(2) == 'ro code':
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section = '.text'
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elif test_rex_iar.group(2) == 'zero' or test_rex_iar.group(2) == 'uninit':
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if test_rex_iar.group(1)[0:4] == 'HEAP':
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section = '.heap'
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elif test_rex_iar.group(1)[0:6] == 'CSTACK':
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section = '.stack'
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else:
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section = '.bss' # default section
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elif test_rex_iar.group(2) == 'inited':
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section = '.data'
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else:
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print "BUG IAR map parser"
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raw_input()
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# lookup object in dictionary and return module name
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object_name = test_rex_iar.group(5)
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if object_name in self.object_to_module:
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module_name = self.object_to_module[object_name]
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else:
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module_name = 'Misc'
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return [module_name,size,section]
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else:
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return ["",0,""] # no valid entry
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def parse_map_file_armcc(self, file):
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"""
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Main logic to decode armcc map files
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"""
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with file as infile:
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# Search area to parse
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for line in infile:
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if self.find_start_armcc(line) == True:
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|
break
|
||
|
|
|
||
|
|
# Start decoding the map file
|
||
|
|
for line in infile:
|
||
|
|
|
||
|
|
[name, size, section] = self.parse_section_armcc(line)
|
||
|
|
|
||
|
|
if size == 0 or name == "" or section == "":
|
||
|
|
pass
|
||
|
|
else:
|
||
|
|
self.module_add(name, size, section)
|
||
|
|
|
||
|
|
def parse_map_file_iar(self, file):
|
||
|
|
"""
|
||
|
|
Main logic to decode armcc map files
|
||
|
|
"""
|
||
|
|
|
||
|
|
with file as infile:
|
||
|
|
|
||
|
|
# Search area to parse
|
||
|
|
for line in infile:
|
||
|
|
if self.find_start_iar(line) == True:
|
||
|
|
break
|
||
|
|
|
||
|
|
# Start decoding the map file
|
||
|
|
for line in infile:
|
||
|
|
|
||
|
|
[name, size, section] = self.parse_section_iar(line)
|
||
|
|
|
||
|
|
if size == 0 or name == "" or section == "":
|
||
|
|
pass
|
||
|
|
else:
|
||
|
|
self.module_add(name, size, section)
|
||
|
|
|
||
|
|
def search_objects(self,path,toolchain):
|
||
|
|
"""
|
||
|
|
Check whether the specified map file matches with the toolchain.
|
||
|
|
Searches for object files and creates mapping: object --> module
|
||
|
|
"""
|
||
|
|
|
||
|
|
path = path.replace('\\','/')
|
||
|
|
|
||
|
|
# check location of map file
|
||
|
|
rex = r'^(.+\/)' + re.escape(toolchain) + r'\/(.+\.map)$'
|
||
|
|
test_rex = re.match(rex,path)
|
||
|
|
|
||
|
|
if test_rex:
|
||
|
|
search_path = test_rex.group(1) + toolchain + '/mbed-os/'
|
||
|
|
else:
|
||
|
|
# It looks this is not an mbed OS project
|
||
|
|
# object-to-module mapping cannot be generated
|
||
|
|
print "Warning: specified toolchain doesn't match with path to the memory map file."
|
||
|
|
return
|
||
|
|
|
||
|
|
for root, dirs, files in os.walk(search_path):
|
||
|
|
for file in files:
|
||
|
|
if file.endswith(".o"):
|
||
|
|
module_name, object_name = self.path_object_to_module_name(os.path.join(root, file))
|
||
|
|
|
||
|
|
if object_name in self.object_to_module:
|
||
|
|
print "WARNING: multiple usages of object file: %s" % object_name
|
||
|
|
print " Current: %s" % self.object_to_module[object_name]
|
||
|
|
print " New: %s" % module_name
|
||
|
|
print " "
|
||
|
|
|
||
|
|
else:
|
||
|
|
self.object_to_module.update({object_name:module_name})
|
||
|
|
|
||
|
|
def main():
|
||
|
|
|
||
|
|
version = '0.3.7'
|
||
|
|
time_start = time.clock()
|
||
|
|
|
||
|
|
# Parser handling
|
||
|
|
parser = argparse.ArgumentParser(description="Memory Map File Analyser for ARM mbed OS\nversion %s" % version)
|
||
|
|
|
||
|
|
parser.add_argument('file', help='memory map file')
|
||
|
|
|
||
|
|
parser.add_argument('-t','--toolchain', dest='toolchain', help='select a toolchain that corresponds to the memory map file (ARM, GCC_ARM, IAR)',
|
||
|
|
required=True)
|
||
|
|
|
||
|
|
parser.add_argument('-o','--output',help='output file name', required=False)
|
||
|
|
|
||
|
|
parser.add_argument('-j', '--json', dest='json', required=False, action="store_true",
|
||
|
|
help='output in JSON formatted list')
|
||
|
|
|
||
|
|
parser.add_argument('-v', '--version', action='version', version=version)
|
||
|
|
|
||
|
|
# Parse/run command
|
||
|
|
if len(sys.argv) <= 1:
|
||
|
|
parser.print_help()
|
||
|
|
sys.exit(1)
|
||
|
|
|
||
|
|
args, remainder = parser.parse_known_args()
|
||
|
|
|
||
|
|
try:
|
||
|
|
file_input = open(args.file,'rt')
|
||
|
|
except IOError as e:
|
||
|
|
print "I/O error({0}): {1}".format(e.errno, e.strerror)
|
||
|
|
sys.exit(0)
|
||
|
|
|
||
|
|
# Creates parser object
|
||
|
|
t = MemmapParser()
|
||
|
|
|
||
|
|
# Decode map file depending on the toolchain
|
||
|
|
if args.toolchain == "ARM":
|
||
|
|
t.search_objects(os.path.abspath(args.file),args.toolchain)
|
||
|
|
t.parse_map_file_armcc(file_input)
|
||
|
|
elif args.toolchain == "GCC_ARM":
|
||
|
|
t.parse_map_file_gcc(file_input)
|
||
|
|
elif args.toolchain == "IAR":
|
||
|
|
print "WARNING: IAR Compiler not fully supported (yet)"
|
||
|
|
print " "
|
||
|
|
t.search_objects(os.path.abspath(args.file),args.toolchain)
|
||
|
|
t.parse_map_file_iar(file_input)
|
||
|
|
else:
|
||
|
|
print "Invalid toolchain. Options are: ARM, GCC_ARM, IAR"
|
||
|
|
sys.exit(0)
|
||
|
|
|
||
|
|
# Write output in file
|
||
|
|
if args.output != None:
|
||
|
|
try:
|
||
|
|
file_output = open(args.output,'w')
|
||
|
|
t.generate_output(file_output,args.json)
|
||
|
|
file_output.close()
|
||
|
|
except IOError as e:
|
||
|
|
print "I/O error({0}): {1}".format(e.errno, e.strerror)
|
||
|
|
sys.exit(0)
|
||
|
|
else: # Write output in screen
|
||
|
|
t.generate_output(sys.stdout,args.json)
|
||
|
|
|
||
|
|
file_input.close()
|
||
|
|
|
||
|
|
print "Elapsed time: %smS" %int(round((time.clock()-time_start)*1000))
|
||
|
|
|
||
|
|
sys.exit(0)
|
||
|
|
|
||
|
|
if __name__ == "__main__":
|
||
|
|
main()
|