2018-02-20 14:05:12 +00:00
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/* mbed Microcontroller Library
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* Copyright (c) 2018 ARM Limited
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2018-11-09 11:22:52 +00:00
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* SPDX-License-Identifier: Apache-2.0
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2018-02-20 14:05:12 +00:00
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stddef.h>
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#include "drivers/MbedCRC.h"
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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#include "platform/mbed_assert.h"
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2018-02-20 14:05:12 +00:00
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namespace mbed {
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2018-08-13 19:54:56 +00:00
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SingletonPtr<PlatformMutex> mbed_crc_mutex;
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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MBED_STATIC_ASSERT(MBED_CRC_TABLE_SIZE == 0 || MBED_CRC_TABLE_SIZE == 16 || MBED_CRC_TABLE_SIZE == 256,
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"Configuration setting drivers.crc-table-size must be set to 0, 16 or 256");
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#if MBED_CRC_TABLE_SIZE > 0
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/* Tables are arranged for LSB first input. This means they're optimised
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* for reflect_data == true and reflect_result == true. If using 16-entry
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* tables, we need every 16th entry of the 256-entry table - this macro
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* filters.
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*/
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#if MBED_CRC_TABLE_SIZE == 16
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#define CRCS(x0, ...) x0
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#else
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#define CRCS(...) __VA_ARGS__
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#endif
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namespace impl {
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2018-02-20 14:05:12 +00:00
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2018-08-21 15:12:53 +00:00
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template<>
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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const uint8_t MbedCRC<POLY_7BIT_SD, 7, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE] = {
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CRCS(0x00, 0x41, 0x13, 0x52, 0x26, 0x67, 0x35, 0x74, 0x4c, 0x0d, 0x5f, 0x1e, 0x6a, 0x2b, 0x79, 0x38),
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CRCS(0x09, 0x48, 0x1a, 0x5b, 0x2f, 0x6e, 0x3c, 0x7d, 0x45, 0x04, 0x56, 0x17, 0x63, 0x22, 0x70, 0x31),
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CRCS(0x12, 0x53, 0x01, 0x40, 0x34, 0x75, 0x27, 0x66, 0x5e, 0x1f, 0x4d, 0x0c, 0x78, 0x39, 0x6b, 0x2a),
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CRCS(0x1b, 0x5a, 0x08, 0x49, 0x3d, 0x7c, 0x2e, 0x6f, 0x57, 0x16, 0x44, 0x05, 0x71, 0x30, 0x62, 0x23),
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CRCS(0x24, 0x65, 0x37, 0x76, 0x02, 0x43, 0x11, 0x50, 0x68, 0x29, 0x7b, 0x3a, 0x4e, 0x0f, 0x5d, 0x1c),
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CRCS(0x2d, 0x6c, 0x3e, 0x7f, 0x0b, 0x4a, 0x18, 0x59, 0x61, 0x20, 0x72, 0x33, 0x47, 0x06, 0x54, 0x15),
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CRCS(0x36, 0x77, 0x25, 0x64, 0x10, 0x51, 0x03, 0x42, 0x7a, 0x3b, 0x69, 0x28, 0x5c, 0x1d, 0x4f, 0x0e),
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CRCS(0x3f, 0x7e, 0x2c, 0x6d, 0x19, 0x58, 0x0a, 0x4b, 0x73, 0x32, 0x60, 0x21, 0x55, 0x14, 0x46, 0x07),
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CRCS(0x48, 0x09, 0x5b, 0x1a, 0x6e, 0x2f, 0x7d, 0x3c, 0x04, 0x45, 0x17, 0x56, 0x22, 0x63, 0x31, 0x70),
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CRCS(0x41, 0x00, 0x52, 0x13, 0x67, 0x26, 0x74, 0x35, 0x0d, 0x4c, 0x1e, 0x5f, 0x2b, 0x6a, 0x38, 0x79),
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CRCS(0x5a, 0x1b, 0x49, 0x08, 0x7c, 0x3d, 0x6f, 0x2e, 0x16, 0x57, 0x05, 0x44, 0x30, 0x71, 0x23, 0x62),
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CRCS(0x53, 0x12, 0x40, 0x01, 0x75, 0x34, 0x66, 0x27, 0x1f, 0x5e, 0x0c, 0x4d, 0x39, 0x78, 0x2a, 0x6b),
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CRCS(0x6c, 0x2d, 0x7f, 0x3e, 0x4a, 0x0b, 0x59, 0x18, 0x20, 0x61, 0x33, 0x72, 0x06, 0x47, 0x15, 0x54),
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CRCS(0x65, 0x24, 0x76, 0x37, 0x43, 0x02, 0x50, 0x11, 0x29, 0x68, 0x3a, 0x7b, 0x0f, 0x4e, 0x1c, 0x5d),
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CRCS(0x7e, 0x3f, 0x6d, 0x2c, 0x58, 0x19, 0x4b, 0x0a, 0x32, 0x73, 0x21, 0x60, 0x14, 0x55, 0x07, 0x46),
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CRCS(0x77, 0x36, 0x64, 0x25, 0x51, 0x10, 0x42, 0x03, 0x3b, 0x7a, 0x28, 0x69, 0x1d, 0x5c, 0x0e, 0x4f)
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};
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2018-08-21 15:12:53 +00:00
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2018-02-20 14:05:12 +00:00
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template<>
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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const uint8_t MbedCRC<POLY_8BIT_CCITT, 8, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE] = {
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CRCS(0x00, 0x91, 0xe3, 0x72, 0x07, 0x96, 0xe4, 0x75, 0x0e, 0x9f, 0xed, 0x7c, 0x09, 0x98, 0xea, 0x7b),
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CRCS(0x1c, 0x8d, 0xff, 0x6e, 0x1b, 0x8a, 0xf8, 0x69, 0x12, 0x83, 0xf1, 0x60, 0x15, 0x84, 0xf6, 0x67),
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CRCS(0x38, 0xa9, 0xdb, 0x4a, 0x3f, 0xae, 0xdc, 0x4d, 0x36, 0xa7, 0xd5, 0x44, 0x31, 0xa0, 0xd2, 0x43),
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CRCS(0x24, 0xb5, 0xc7, 0x56, 0x23, 0xb2, 0xc0, 0x51, 0x2a, 0xbb, 0xc9, 0x58, 0x2d, 0xbc, 0xce, 0x5f),
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CRCS(0x70, 0xe1, 0x93, 0x02, 0x77, 0xe6, 0x94, 0x05, 0x7e, 0xef, 0x9d, 0x0c, 0x79, 0xe8, 0x9a, 0x0b),
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CRCS(0x6c, 0xfd, 0x8f, 0x1e, 0x6b, 0xfa, 0x88, 0x19, 0x62, 0xf3, 0x81, 0x10, 0x65, 0xf4, 0x86, 0x17),
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CRCS(0x48, 0xd9, 0xab, 0x3a, 0x4f, 0xde, 0xac, 0x3d, 0x46, 0xd7, 0xa5, 0x34, 0x41, 0xd0, 0xa2, 0x33),
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CRCS(0x54, 0xc5, 0xb7, 0x26, 0x53, 0xc2, 0xb0, 0x21, 0x5a, 0xcb, 0xb9, 0x28, 0x5d, 0xcc, 0xbe, 0x2f),
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CRCS(0xe0, 0x71, 0x03, 0x92, 0xe7, 0x76, 0x04, 0x95, 0xee, 0x7f, 0x0d, 0x9c, 0xe9, 0x78, 0x0a, 0x9b),
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CRCS(0xfc, 0x6d, 0x1f, 0x8e, 0xfb, 0x6a, 0x18, 0x89, 0xf2, 0x63, 0x11, 0x80, 0xf5, 0x64, 0x16, 0x87),
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CRCS(0xd8, 0x49, 0x3b, 0xaa, 0xdf, 0x4e, 0x3c, 0xad, 0xd6, 0x47, 0x35, 0xa4, 0xd1, 0x40, 0x32, 0xa3),
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CRCS(0xc4, 0x55, 0x27, 0xb6, 0xc3, 0x52, 0x20, 0xb1, 0xca, 0x5b, 0x29, 0xb8, 0xcd, 0x5c, 0x2e, 0xbf),
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CRCS(0x90, 0x01, 0x73, 0xe2, 0x97, 0x06, 0x74, 0xe5, 0x9e, 0x0f, 0x7d, 0xec, 0x99, 0x08, 0x7a, 0xeb),
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CRCS(0x8c, 0x1d, 0x6f, 0xfe, 0x8b, 0x1a, 0x68, 0xf9, 0x82, 0x13, 0x61, 0xf0, 0x85, 0x14, 0x66, 0xf7),
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CRCS(0xa8, 0x39, 0x4b, 0xda, 0xaf, 0x3e, 0x4c, 0xdd, 0xa6, 0x37, 0x45, 0xd4, 0xa1, 0x30, 0x42, 0xd3),
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CRCS(0xb4, 0x25, 0x57, 0xc6, 0xb3, 0x22, 0x50, 0xc1, 0xba, 0x2b, 0x59, 0xc8, 0xbd, 0x2c, 0x5e, 0xcf)
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};
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2018-02-20 14:05:12 +00:00
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template<>
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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const uint16_t MbedCRC<POLY_16BIT_CCITT, 16, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE] = {
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CRCS(0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7),
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CRCS(0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876),
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CRCS(0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5),
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CRCS(0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974),
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CRCS(0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3),
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CRCS(0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72),
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CRCS(0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1),
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CRCS(0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70),
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CRCS(0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff),
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CRCS(0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e),
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CRCS(0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd),
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CRCS(0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c),
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CRCS(0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb),
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CRCS(0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a),
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CRCS(0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9),
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CRCS(0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78)
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};
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2018-02-20 14:05:12 +00:00
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template<>
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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const uint16_t MbedCRC<POLY_16BIT_IBM, 16, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE] = {
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CRCS(0x0000, 0xc0c1, 0xc181, 0x0140, 0xc301, 0x03c0, 0x0280, 0xc241, 0xc601, 0x06c0, 0x0780, 0xc741, 0x0500, 0xc5c1, 0xc481, 0x0440),
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CRCS(0xcc01, 0x0cc0, 0x0d80, 0xcd41, 0x0f00, 0xcfc1, 0xce81, 0x0e40, 0x0a00, 0xcac1, 0xcb81, 0x0b40, 0xc901, 0x09c0, 0x0880, 0xc841),
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CRCS(0xd801, 0x18c0, 0x1980, 0xd941, 0x1b00, 0xdbc1, 0xda81, 0x1a40, 0x1e00, 0xdec1, 0xdf81, 0x1f40, 0xdd01, 0x1dc0, 0x1c80, 0xdc41),
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CRCS(0x1400, 0xd4c1, 0xd581, 0x1540, 0xd701, 0x17c0, 0x1680, 0xd641, 0xd201, 0x12c0, 0x1380, 0xd341, 0x1100, 0xd1c1, 0xd081, 0x1040),
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CRCS(0xf001, 0x30c0, 0x3180, 0xf141, 0x3300, 0xf3c1, 0xf281, 0x3240, 0x3600, 0xf6c1, 0xf781, 0x3740, 0xf501, 0x35c0, 0x3480, 0xf441),
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CRCS(0x3c00, 0xfcc1, 0xfd81, 0x3d40, 0xff01, 0x3fc0, 0x3e80, 0xfe41, 0xfa01, 0x3ac0, 0x3b80, 0xfb41, 0x3900, 0xf9c1, 0xf881, 0x3840),
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CRCS(0x2800, 0xe8c1, 0xe981, 0x2940, 0xeb01, 0x2bc0, 0x2a80, 0xea41, 0xee01, 0x2ec0, 0x2f80, 0xef41, 0x2d00, 0xedc1, 0xec81, 0x2c40),
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CRCS(0xe401, 0x24c0, 0x2580, 0xe541, 0x2700, 0xe7c1, 0xe681, 0x2640, 0x2200, 0xe2c1, 0xe381, 0x2340, 0xe101, 0x21c0, 0x2080, 0xe041),
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CRCS(0xa001, 0x60c0, 0x6180, 0xa141, 0x6300, 0xa3c1, 0xa281, 0x6240, 0x6600, 0xa6c1, 0xa781, 0x6740, 0xa501, 0x65c0, 0x6480, 0xa441),
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CRCS(0x6c00, 0xacc1, 0xad81, 0x6d40, 0xaf01, 0x6fc0, 0x6e80, 0xae41, 0xaa01, 0x6ac0, 0x6b80, 0xab41, 0x6900, 0xa9c1, 0xa881, 0x6840),
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CRCS(0x7800, 0xb8c1, 0xb981, 0x7940, 0xbb01, 0x7bc0, 0x7a80, 0xba41, 0xbe01, 0x7ec0, 0x7f80, 0xbf41, 0x7d00, 0xbdc1, 0xbc81, 0x7c40),
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CRCS(0xb401, 0x74c0, 0x7580, 0xb541, 0x7700, 0xb7c1, 0xb681, 0x7640, 0x7200, 0xb2c1, 0xb381, 0x7340, 0xb101, 0x71c0, 0x7080, 0xb041),
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CRCS(0x5000, 0x90c1, 0x9181, 0x5140, 0x9301, 0x53c0, 0x5280, 0x9241, 0x9601, 0x56c0, 0x5780, 0x9741, 0x5500, 0x95c1, 0x9481, 0x5440),
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CRCS(0x9c01, 0x5cc0, 0x5d80, 0x9d41, 0x5f00, 0x9fc1, 0x9e81, 0x5e40, 0x5a00, 0x9ac1, 0x9b81, 0x5b40, 0x9901, 0x59c0, 0x5880, 0x9841),
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CRCS(0x8801, 0x48c0, 0x4980, 0x8941, 0x4b00, 0x8bc1, 0x8a81, 0x4a40, 0x4e00, 0x8ec1, 0x8f81, 0x4f40, 0x8d01, 0x4dc0, 0x4c80, 0x8c41),
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CRCS(0x4400, 0x84c1, 0x8581, 0x4540, 0x8701, 0x47c0, 0x4680, 0x8641, 0x8201, 0x42c0, 0x4380, 0x8341, 0x4100, 0x81c1, 0x8081, 0x4040)
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};
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2018-02-20 14:05:12 +00:00
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template<>
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Revise MbedCRC template
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
2019-09-24 13:49:04 +00:00
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const uint32_t MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE>::_crc_table[MBED_CRC_TABLE_SIZE] = {
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CRCS(0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91),
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CRCS(0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5),
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CRCS(0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59),
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CRCS(0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d),
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CRCS(0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01),
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CRCS(0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65),
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CRCS(0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9),
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CRCS(0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad),
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CRCS(0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1),
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CRCS(0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5),
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CRCS(0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79),
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CRCS(0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d),
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CRCS(0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21),
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CRCS(0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45),
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CRCS(0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9),
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CRCS(0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d)
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};
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} // namespace impl
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#endif // MBED_CRC_TABLE_SIZE > 0
|
2018-02-20 14:05:12 +00:00
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} // namespace mbed
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