mirror of https://github.com/ARMmbed/mbed-os.git
105 lines
3.1 KiB
C
105 lines
3.1 KiB
C
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/**************************************************************************//**
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* @file system_CMSDK_CM0.c
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* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Source File for
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* Device CMSDK
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* @version V3.01
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* @date 06. March 2012
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*
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* @note
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* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
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*
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* @par
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* ARM Limited (ARM) is supplying this software for use with Cortex-M
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* processor based microcontrollers. This file can be freely distributed
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* within development tools that are supporting such ARM based processors.
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*
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* @par
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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******************************************************************************/
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#include "system_W7500x.h"
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/*----------------------------------------------------------------------------
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DEFINES
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*----------------------------------------------------------------------------*/
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//#define SYSCLK_EXTERN_OSC
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/*----------------------------------------------------------------------------
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Clock Variable definitions
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*----------------------------------------------------------------------------*/
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uint32_t SystemFrequency = 0; /*!< System Clock Frequency (Core Clock) */
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uint32_t SystemCoreClock = 0; /*!< Processor Clock Frequency */
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/*----------------------------------------------------------------------------
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Clock functions
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*----------------------------------------------------------------------------*/
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void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
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{
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uint8_t M,N,OD;
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#ifdef SYSCLK_EXTERN_OSC
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CRG->PLL_IFSR = CRG_PLL_IFSR_OCLK;
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#else
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CRG->PLL_IFSR = CRG_PLL_IFSR_RCLK;
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#endif
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OD = (1 << (CRG->PLL_FCR & 0x01)) * (1 << ((CRG->PLL_FCR & 0x02) >> 1));
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N = (CRG->PLL_FCR >> 8 ) & 0x3F;
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M = (CRG->PLL_FCR >> 16) & 0x3F;
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#ifdef SYSCLK_EXTERN_OSC
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SystemCoreClock = EXTERN_XTAL * M / N * 1 / OD;
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#else
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SystemCoreClock = INTERN_XTAL * M / N * 1 / OD;
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#endif
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}
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uint32_t GetSystemClock()
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{
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return SystemCoreClock;
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}
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System.
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*/
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void SystemInit (void)
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{
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uint8_t M,N,OD;
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(*((volatile uint32_t *)(W7500x_TRIM_BGT))) = (*((volatile uint32_t *)(W7500x_INFO_BGT)));
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(*((volatile uint32_t *)(W7500x_TRIM_OSC))) = (*((volatile uint32_t *)(W7500x_INFO_OSC)));
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// Set PLL input frequency
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#ifdef SYSCLK_EXTERN_OSC
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CRG->PLL_IFSR = CRG_PLL_IFSR_OCLK;
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#else
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CRG->PLL_IFSR = CRG_PLL_IFSR_RCLK;
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#endif
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OD = (1 << (CRG->PLL_FCR & 0x01)) * (1 << ((CRG->PLL_FCR & 0x02) >> 1));
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N = (CRG->PLL_FCR >> 8 ) & 0x3F;
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M = (CRG->PLL_FCR >> 16) & 0x3F;
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#ifdef SYSCLK_EXTERN_OSC
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SystemCoreClock = EXTERN_XTAL * M / N * 1 / OD;
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#else
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SystemCoreClock = INTERN_XTAL * M / N * 1 / OD;
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#endif
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}
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