
LR_IROM1 0x00000000 0x10000  {    ; load region size_region
  ER_IROM1 0x00000000 0x10000  {  ; load address = execution address
   *.o (RESET, +First)
   *(InRoot$$Sections)
   .ANY (+RO)
  }
  ; 8_byte_aligned(48 vect * 4 bytes) =  8_byte_aligned(0xC0) = 0xC0
  ; 8KB - 0xC0 = 0x1F40
  RW_IRAM1 0x100000C0 0x1F40  {
   .ANY (+RW +ZI)
  }
  RW_IRAM2 0x20000000 0x800  {  ; RW data
   .ANY (AHBSRAM0)
  }
  RW_IRAM3 0x20004000 0x800  {  ; RW data, USB RAM
   .ANY (AHBSRAM1)
  }
}
