
LR_IROM1 0x14000000 0x00400000  {    ; load region size_region
  ER_IROM1 0x14000000 0x00400000  {  ; load address = execution address
   *.o (RESET, +First)
   *(InRoot$$Sections)
   .ANY (+RO)
  }
  ; 8_byte_aligned(69 vect * 4 bytes) =  8_byte_aligned(0x0114) = 0x0118
  ; 128KB - 0x0118 = 0x0001FEE8
  RW_IRAM1 0x10000118 0x1FEE8  {
   .ANY (+RW +ZI)
  }
  RW_IRAM2 0x10080000 0x12000 {  ; RW data
   .ANY (IRAM2)
  }
  RW_IRAM3 0x20000000 0x8000  {  ; RW data
   .ANY (AHBSRAM0)
  }
  RW_IRAM4 0x20008000 0x4000  {  ; RW data
   .ANY (AHBSRAM1)
  }
  RW_IRAM5 0x2000C000 0x4000  {  ; RW data
   .ANY (AHBSRAM2)
  }
}
